A Novel Design Approach to an AMBA AHB Compliant Memory Controller”, International Journal of Advances in Engineering

Microprocessor performance has improved rapidly these years. In contrast, memory latencies and bandwidths have improved little. The result is that the memory access time has been a bottleneck which limits the system performance. Memory controller (MC) is designed and built to attacking this problem. The memory controller is the part of the system that, well, controls the memory. The memory controller is normally integrated into the system chipset. This paper shows how to build an Advanced Micro controller Bus Architecture (AMBA) compliant MC as an Advanced High-performance Bus (AHB) slave. The Advanced Microcontroller Bus Architecture (AMBA) is used as the on-chip bus in system-on-a-chip designs The MC is designed for system memory control with the main memory consisting of SRAM and ROM. The design perspective presented over here is very simple and helps to understand on development of a logical design from available theoretical details. This paper aims to reveal the fact that the efficiency of a memory controller can be increased to a large extend with the help of AMBA AHB